The present invention relates to analog multipliers, and more particularly, multipliers operating in two quadrants and including novel means for conveniently generating an electrical output signal which is the linear product of two input signals or the linear product of the first input signal and the antilogarithm of the second input signal.
The most common method of performing two quadrant multiplication has been to vary the transconductance and hence the amount of amplification of a differential pair of transistors by varying the magnitude of the current being supplied to the junction of the two emitters of the transistor pair. One of the signals to be multiplied is converted to this current and the other signal is applied differentially to the bases of the transistor pair. The output signal is usually taken differentially from the two collectors of the transistor pair and contains only the linear product of the two input signals as expressed by the following general equation: EQU So = K S.sub.1 . S.sub.2 ( 1)
where So is the output signal, S.sub.1 and S.sub.2 are the two input signals, and K is a constant of proportionality.
In many electronic devices which utilize analog multipliers, such as voltage controlled oscillators, voltage controlled amplifiers, and voltage controlled filters and phase shifters, it is often desirable that the output parameter of the device be proportional to the antilogarithm of the input control signal. Such requirements are found in linear/logarithmic function generators and electronic musical instruments. Hence, the multiplier comprising such devices must generate the linear product between a first input signal and the antilog of a second input signal, that is: EQU So = K a .sup.S.sbsp.2 . S.sub.1 ( 2)
where So is the output signal, S.sub.1 and S.sub.2 are the first and second input signals respectively, and K and a are constants.
In order to make the differential transistor pair type of multiplier capable of generating the antilog product function expressed by equation (2), the current supplying the transistor pair would be generated by an antilog converter, the magnitude of this current hence being the antilog of one of the input signals.
Although this method is feasible, it is indirect and requires a considerable amount of additional circuitry. Thus, it would be advantageous to provide a means for more directly and simply generating the antilog product function.